The invention relates to a semiconductor charge multiplication amplifier device stage that comprises a series arrangement of a plurality of clock electrodes (81,82) on top of a semiconductor body for transporting through the semiconductor body packages of charge carriers from an image sensor section towards an output section, the device further comprising an impact ionization facility for by means of applying an electric field strength multiplying the charge carriers during their transport from the image section to the output section,
Prior art, as represented by U.S. Pat. No. 5,337,340 to Jaroslav Hynecek and assigned to Texas Instruments of Dallas, Tex., has recognized advantageous properties of charge multiplication devices which are operative through ionizing field strengths, or colloquially called “avalanche devices” that are especially, but not exclusively, intended for use in image sensor devices based on CCD technology. This technology allows charge signal amplification before detection in a CCD readout node, for so almost completely eliminating any noise that could be associated with an electronic on-chip pre-amplifier. For the case of CCD imagers, this latter aspect fortunately allows application at extremely low input light intensities.
However, various drawbacks are associated to the prior art technology. Firstly, the technology requires a high frequency clock source for controlling various voltages at precisely monitored and tightly controlled voltage levels for ensuring both high and also time-uniform amplification factors. Secondly, and even more pertinent, the recited prior art is deficient in providing a linear amplification, because the charge multiplication in an output register strongly depends on the effective potential difference under adjacent gates in a multiplication stage. This difference in potential is in particular modulated by the accumulated charge packet itself, and therefore, the amount of modulation depends on the amount of accumulation.